TLC6C598QPWRQ1

TLC6C598QPWRQ1 contains an 8-bit serial input and parallel output shift register to supply power to the 8-bit D-type storage register. Data is transmitted through the shift register and the storage register on the rising edges of the shift register clock and the register clock respectively. When the shift register is cleared to a high level, the storage register transfers the data to the output buffer. A low level on CLR\ will clear all registers in the device. Keep the output enable high, keep all data in the output buffer low, and all drain outputs are off. turned off.